Renames and restructures VGA timing generator for clarity and modularity.
Introduces VGA modes package for centralized resolution and timing configuration.
Updates related testbenches and constraints to align with new structure.
Improves maintainability and flexibility for future VGA mode additions.
Replaces separate VGA Red, Green, and Blue output signals with a unified 8-bit VGA pixel bus for improved signal management.
Updates signal mapping, testbench, and constraints file to reflect the new structure.
Enhances maintainability and reduces signal complexity.
Introduces a new VGA module for pixel rendering and sync signal generation. Implements an XY position generator for coordinate management. Updates testbench with color cycling logic and additional color constants. Adjusts timing generator logic for improved sync signal handling and accuracy. Modifies UCF constraints for compatibility with LVTTL standard.
Improves modularity and flexibility of the VGA system.
Aligns signal and port declarations for improved readability.
Adjusts horizontal and vertical counter bit-width calculations for accuracy.
Splits conditional statements across multiple lines for better clarity.
No functional changes introduced.
