Commit Graph

3 Commits

Author SHA1 Message Date
a73f125357 Refactors VGA timing and mode handling
Renames and restructures VGA timing generator for clarity and modularity.
Introduces VGA modes package for centralized resolution and timing configuration.
Updates related testbenches and constraints to align with new structure.
Improves maintainability and flexibility for future VGA mode additions.
2025-04-26 10:26:52 +00:00
319b51bf56 Consolidates VGA output signals into a single pixel bus
Replaces separate VGA Red, Green, and Blue output signals with a unified 8-bit VGA pixel bus for improved signal management.
Updates signal mapping, testbench, and constraints file to reflect the new structure.

Enhances maintainability and reduces signal complexity.
2025-04-25 16:07:57 +00:00
c449016835 Add VGA Timing Generator implementation and testbench files
Test @ 1080P
2025-03-27 16:00:08 +00:00