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Enhanced build config flexibility & updated docs

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Refined the Makefile to accommodate pre-programming commands with `PROGRAMMER_PRE` variable and introduced a specific index for flashing with Digilent devices using `DJTG_FLASH_INDEX`. This allows for more flexible configuration pre-programming hooks and coherent handling of different indices for programming and flashing operations.

The README has been updated for clarity and to reflect new options. Simplified the installation instructions for GNU Make, enriched the project configuration section with default values for build options, introduced library naming for Verilog sources, and added a section detailing console output for easy report access post-build. Additionally, documented the new `make flash` target for Digilent programmers and the placeholder for `PROGRAMMER_PRE`.
This commit is contained in:
0xMax42
2024-03-08 19:22:42 +01:00
parent 4e1f44b718
commit 4893f9cf7c
2 changed files with 87 additions and 35 deletions
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56
Makefile
View File

@@ -35,30 +35,32 @@ ifndef TARGET_PART
$(error TARGET_PART must be defined) $(error TARGET_PART must be defined)
endif endif
TOPLEVEL ?= $(PROJECT) TOPLEVEL ?= $(PROJECT)
CONSTRAINTS ?= $(PROJECT).ucf CONSTRAINTS ?= $(PROJECT).ucf
BITFILE ?= build/$(PROJECT).bit BITFILE ?= build/$(PROJECT).bit
COMMON_OPTS ?= -intstyle xflow
XST_OPTS ?=
NGDBUILD_OPTS ?=
MAP_OPTS ?= -detail
PAR_OPTS ?=
BITGEN_OPTS ?=
TRACE_OPTS ?= -v 3 -n 3
FUSE_OPTS ?= -incremental
PROGRAMMER ?= none
PROGRAMMER_PRE ?=
IMPACT_OPTS ?= -batch impact.cmd
DJTG_EXE ?= djtgcfg
DJTG_DEVICE ?= DJTG_DEVICE-NOT-SET
DJTG_INDEX ?= 0
DJTG_FLASH_INDEX ?= 1
COMMON_OPTS ?= -intstyle xflow XC3SPROG_EXE ?= xc3sprog
XST_OPTS ?= XC3SPROG_CABLE ?= none
NGDBUILD_OPTS ?= XC3SPROG_OPTS ?=
MAP_OPTS ?=
PAR_OPTS ?= -detail
BITGEN_OPTS ?=
TRACE_OPTS ?= -v 3 -n 3
FUSE_OPTS ?= -incremental
PROGRAMMER ?= none
IMPACT_OPTS ?= -batch impact.cmd
DJTG_EXE ?= djtgcfg
DJTG_DEVICE ?= DJTG_DEVICE-NOT-SET
DJTG_INDEX ?= 0
XC3SPROG_EXE ?= xc3sprog
XC3SPROG_CABLE ?= none
XC3SPROG_OPTS ?=
########################################################################### ###########################################################################
@@ -209,17 +211,17 @@ isimgui: build/isim_$(TB)$(EXE)
ifeq ($(PROGRAMMER), impact) ifeq ($(PROGRAMMER), impact)
prog: $(BITFILE) prog: $(BITFILE)
sudo $(XILINX)/bin/$(XILINX_PLATFORM)/impact $(IMPACT_OPTS) $(PROGRAMMER_PRE) $(XILINX)/bin/$(XILINX_PLATFORM)/impact $(IMPACT_OPTS)
endif endif
ifeq ($(PROGRAMMER), digilent) ifeq ($(PROGRAMMER), digilent)
prog: $(BITFILE) prog: $(BITFILE)
yes Y | sudo $(DJTG_EXE) prog -d $(DJTG_DEVICE) -i $(DJTG_INDEX) -f $(BITFILE) $(PROGRAMMER_PRE) $(DJTG_EXE) prog -d $(DJTG_DEVICE) -i $(DJTG_INDEX) -f $(BITFILE)
endif endif
ifeq ($(PROGRAMMER), xc3sprog) ifeq ($(PROGRAMMER), xc3sprog)
prog: $(BITFILE) prog: $(BITFILE)
sudo $(XC3SPROG_EXE) -c $(XC3SPROG_CABLE) $(XC3SPROG_OPTS) $(BITFILE) $(PROGRAMMER_PRE) $(XC3SPROG_EXE) -c $(XC3SPROG_CABLE) $(XC3SPROG_OPTS) $(BITFILE)
endif endif
ifeq ($(PROGRAMMER), none) ifeq ($(PROGRAMMER), none)
@@ -233,7 +235,7 @@ endif
ifeq ($(PROGRAMMER), digilent) ifeq ($(PROGRAMMER), digilent)
flash: $(BITFILE) flash: $(BITFILE)
yes Y | sudo $(DJTG_EXE) prog -d $(DJTG_DEVICE) -i $(DJTG_FLASH_INDEX) -f $(BITFILE) $(PROGRAMMER_PRE) $(DJTG_EXE) prog -d $(DJTG_DEVICE) -i $(DJTG_FLASH_INDEX) -f $(BITFILE)
endif endif
########################################################################### ###########################################################################

66
README.md
View File

@@ -12,9 +12,11 @@ Many thanks for the good work!
- Xilinx ISE, ideally 14.7 (the final version) - Xilinx ISE, ideally 14.7 (the final version)
- GNU (or compatible?) Make \ Works great on Linux. Windows Subsystem for Linux is tested and works well.
Install this through Cygwin on Windows \
or on Linux. (Windows Subsystem for Linux is tested) - GNU (or compatible?) Make
Install this through Cygwin on Windows.
## Creating a project ## Creating a project
@@ -51,6 +53,13 @@ it consists of `KEY = value` pairs. It must define at least the following keys:
VSOURCE += foo.v VSOURCE += foo.v
VSOURCE += bar.v VSOURCE += bar.v
You can also add a library name to the source file, e.g.
VSOURCE += my_lib:foo.v
VSOURCE += my_lib:bar.v
The default library name is `work`.
A simple `project.cfg` may thus resemble: A simple `project.cfg` may thus resemble:
PROJECT = example PROJECT = example
@@ -87,8 +96,19 @@ A number of other keys can be set in the project configuration, including:
- `XST_OPTS`, `NGDBUILD_OPTS`, `MAP_OPTS`, `PAR_OPTS`, `BITGEN_OPTS`, - `XST_OPTS`, `NGDBUILD_OPTS`, `MAP_OPTS`, `PAR_OPTS`, `BITGEN_OPTS`,
`TRACE_OPTS`, `FUSE_OPTS` `TRACE_OPTS`, `FUSE_OPTS`
Extra command-line options to be passed to the corresponding ISE tools. All Extra command-line options to be passed to the corresponding ISE tools.
default to empty.
Defaults is:
```
XST_OPTS ?=
NGDBUILD_OPTS ?=
MAP_OPTS ?= -detail
PAR_OPTS ?=
BITGEN_OPTS ?=
TRACE_OPTS ?= -v 3 -n 3
FUSE_OPTS ?= -incremental
```
Note that `XST_OPTS` will not appear on the command line during Note that `XST_OPTS` will not appear on the command line during
compilation, as the XST options are embedded in a script file. compilation, as the XST options are embedded in a script file.
@@ -122,7 +142,8 @@ A number of other keys can be set in the project configuration, including:
Uses the Digilent JTAG utility for programming, which must be installed Uses the Digilent JTAG utility for programming, which must be installed
separately. The name of the board must be set as `DJTG_DEVICE`; the separately. The name of the board must be set as `DJTG_DEVICE`; the
path to the djtgcfg executable can be set as `DJTG_EXE`, and the index path to the djtgcfg executable can be set as `DJTG_EXE`, and the index
of the device can be set as `DJTG_INDEX`. of the device can be set as `DJTG_INDEX`. You can set the flash index
with `DJTG_FLASH_INDEX`.
- `xc3sprog` - `xc3sprog`
@@ -130,6 +151,11 @@ A number of other keys can be set in the project configuration, including:
separately. The cable name must be set as `XC3SPROG_CABLE`; additional separately. The cable name must be set as `XC3SPROG_CABLE`; additional
options can be set as `XC3SPROG_OPTS`. options can be set as `XC3SPROG_OPTS`.
- `PROGRAMMER_PRE`
A command to be run before programming. This can be used to use `sudo` or
`yes` to confirm programming.
## Targets ## Targets
The Xilinx ISE Makefile implements the following targets: The Xilinx ISE Makefile implements the following targets:
@@ -147,9 +173,31 @@ The Xilinx ISE Makefile implements the following targets:
Writes the bitstream to a target device. Requires some additional Writes the bitstream to a target device. Requires some additional
configuration; see below for details. configuration; see below for details.
## Running unit tests - `make flash`
is a work in progress. Writes the bitstream to a flash device.
**This is currently only for digilent implemented.**
## Console output
After a successful build, you will find the paths to the generated **reports** on the console. E.g.:
```
============ Reports.. ===========
==== Synthesis Summary Report ====
./build/Example.srp
======= Map Summary Report =======
./build/Example.map.mrp
======= PAR Summary Report =======
./build/Example.par
===== Pinout Summary Report ======
./build/Example_pad.txt
```
## Unimplemented features ## Unimplemented features
@@ -164,6 +212,8 @@ encouraged!)
- Display and/or handling of warnings and errors from `build/_xmsgs` - Display and/or handling of warnings and errors from `build/_xmsgs`
- Running unit tests
- Anything else (open an issue?) - Anything else (open an issue?)
## License ## License