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93d441531d
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Add HDL elements and interfaces for VHDL types, generics, functions, procedures, constants, variables, assignments, and ports
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2025-04-02 19:52:28 +02:00 |
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f83190eab2
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Add return type annotation to extract method in SignalExtractor
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2025-03-29 22:57:30 +01:00 |
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8d01e09ca4
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index.ts actualy as test
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2025-03-29 22:56:15 +01:00 |
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3c16632a91
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First code commit
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2025-03-29 22:56:04 +01:00 |
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b80e89af6d
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WASM tree-sitter VHDL model
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2025-03-29 22:55:45 +01:00 |
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