|
|
93d441531d
|
Add HDL elements and interfaces for VHDL types, generics, functions, procedures, constants, variables, assignments, and ports
|
2025-04-02 19:52:28 +02:00 |
|
|
|
d027a1831a
|
Correct version from 1.0.0 to 0.0.1 in package.json
|
2025-03-29 22:58:11 +01:00 |
|
|
|
f83190eab2
|
Add return type annotation to extract method in SignalExtractor
|
2025-03-29 22:57:30 +01:00 |
|
|
|
314c43688b
|
Remove "protocol" setting from launch configuration
|
2025-03-29 22:57:22 +01:00 |
|
|
|
8d01e09ca4
|
index.ts actualy as test
|
2025-03-29 22:56:15 +01:00 |
|
|
|
3c16632a91
|
First code commit
|
2025-03-29 22:56:04 +01:00 |
|
|
|
b80e89af6d
|
WASM tree-sitter VHDL model
|
2025-03-29 22:55:45 +01:00 |
|
|
|
3e85a5384d
|
VS Code configuration
|
2025-03-29 22:55:18 +01:00 |
|
|
|
19180d4516
|
Base configuration
|
2025-03-29 22:55:08 +01:00 |
|
|
|
482b9cae09
|
Add .gitignore to exclude node_modules, dist, and other build artifacts
|
2025-03-29 22:54:45 +01:00 |
|