93d441531d
Add HDL elements and interfaces for VHDL types, generics, functions, procedures, constants, variables, assignments, and ports
main
Max P.2025-04-02 19:52:28 +02:00
d027a1831a
Correct version from 1.0.0 to 0.0.1 in package.json
Max P.2025-03-29 22:58:11 +01:00
f83190eab2
Add return type annotation to extract method in SignalExtractor
Max P.2025-03-29 22:57:30 +01:00
314c43688b
Remove "protocol" setting from launch configuration
Max P.2025-03-29 22:57:22 +01:00
8d01e09ca4
index.ts actualy as test
Max P.2025-03-29 22:56:15 +01:00