feat(src): define clock constraints in ROB.ucf

- Adds clock net mapping and timing specifications
- Defines a 200 MHz clock period with 50% duty cycle

src/ROB.ucf

@@ -0,0 +1,3 @@
+NET I_CLK LOC = B8; 
+NET I_CLK	TNM_NET = CLOCK;
+TIMESPEC TS_CLOCK = PERIOD CLOCK 200 MHz HIGH 50 %;