Files
Xilinx-ISE-Build/tasks/generate_prj.py
MaxP 2fce367686 Add project configuration and build tools
- Introduced new scripts for project generation and synthesis (dodo.py, generate_prj.py, generate_scr.py, run_xst.py).
- Implemented configuration parsing for VHDL sources and project settings (config.py).
- Added default configuration values (defaults.py).
- Updated .gitignore to include additional file types.
- Created test cases for project generation and configuration parsing (test_generate_prj.py, test_generate_scr.py, test_project_cfg.py).
2025-04-20 11:32:37 +00:00

15 lines
555 B
Python

import os
from tools.config import get_vhdl_sources_and_tests
from tools.paths import REL_FROM_WORKING_TO_ROOT as REL_ROOT, ROOT, WORKING
from pathlib import Path
def generate_prj(prj_path: Path, *_):
sources, _ = get_vhdl_sources_and_tests()
prj_path.parent.mkdir(parents=True, exist_ok=True)
with prj_path.open("w", encoding="utf-8") as f:
for libname, files in sources.items():
for file in files:
rel_path = os.path.relpath(ROOT / file, WORKING)
f.write(f"vhdl {libname} {rel_path}\n")