HDL/Pipeline-AXI-Handshake
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Fix the links in the readme file

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0xMax42
2024-03-24 20:12:43 +01:00
parent 5c9fad9cdc
commit f0c7144550
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README.md
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@@ -4,13 +4,13 @@
## Diagram ## Diagram
![Diagram](PipelineController.svg "Diagram") ![Diagram](docs/PipelineController.svg "Diagram")
## Description ## Description
- Name: **Pipeline Controller** - Name: **Pipeline Controller**
- Version: 0.0.1 - Version: 0.0.1
- Author: _Maximilian Passarello ([Blog](mpassarello.de))_ - Author: _Maximilian Passarello ([Blog](http://mpassarello.de))_
- License: [MIT](LICENSE) - License: [MIT](LICENSE)
The Pipeline Controller provides an easy way to construct a pipeline The Pipeline Controller provides an easy way to construct a pipeline
@@ -118,13 +118,13 @@ This is used to activate or deactivate the pipeline in full or via CE deactivate
## Diagram ## Diagram
![Diagram](PipelineRegister.svg "Diagram") ![Diagram](docs/PipelineRegister.svg "Diagram")
## Description ## Description
- Name: **Pipeline Register** - Name: **Pipeline Register**
- Version: 0.0.1 - Version: 0.0.1
- Author: _Maximilian Passarello ([Blog](mpassarello.de))_ - Author: _Maximilian Passarello ([Blog](http://mpassarello.de))_
- License: [MIT](LICENSE) - License: [MIT](LICENSE)
The pipeline register provides a simple way to pipeline combinatorial logic using the **register rebalancing** of the synthesis. The pipeline register provides a simple way to pipeline combinatorial logic using the **register rebalancing** of the synthesis.