Add first version.

This commit is contained in:
2024-03-24 01:31:49 +01:00
parent 9ef431c636
commit e03dc4e0c8
14 changed files with 638 additions and 69 deletions

View File

@@ -2,20 +2,20 @@
# Project name
# @remark The name of the project is used as default name for the top module and the ucf file
PROJECT =
PROJECT = Pipeline
# Target device
# @example xc3s1200e-4-fg320 | xc5vlx50t-1-ff1136
TARGET_PART =
TARGET_PART = xc3s1200e-4-fg320
# Path to the Xilinx ISE installation
XILINX = /opt/Xilinx/14.7/ISE_DS/ISE
# Optional the name of the top module (default is the project name)
# TOPLEVEL =
TOPLEVEL = Pipeline_pb
# Optional the name of the ucf file (default is the project name)
# CONSTRAINTS =
CONSTRAINTS = src/Pipeline_pb.ucf
## ## ## ## ## ## ## ##
# ---------------------
@@ -25,7 +25,11 @@ XILINX = /opt/Xilinx/14.7/ISE_DS/ISE
# @example `VSOURCE += src/main.v` (add a single Verilog file per line)
# @example `VHDSOURCE += src/main.vhd` (add a single VHDL file per line)
VHDSOURCE += src/Pipeline_pb.vhd
VHDSOURCE += src/PipelineController.vhd
VHDSOURCE += src/PipelineRegister.vhd
VHDTEST += tests/Pipeline_tb.vhd
## ## ## ## ## ## ## ##
# ---------------------
@@ -35,18 +39,18 @@ XILINX = /opt/Xilinx/14.7/ISE_DS/ISE
# General command line options to be passed to all ISE executables (default is `-intstyle xflow`)
# COMMON_OPTS =
# Options for the XST synthesizer
# XST_OPTS =
XST_OPTS = -opt_mode speed -opt_level 2
# Options for the NGDBuild tool
# NGDBUILD_OPTS =
# Options for the MAP tool
# @example -mt 2 (multi-threading with 2 threads)
# MAP_OPTS =
MAP_OPTS = -cm speed -ol high -detail -timing
# Options for the PAR tool
# @example -mt 2 (multi-threading with 2 threads)
# PAR_OPTS =
PAR_OPTS = -ol high
# Options for the BitGen tool
# @example -g Compress (compress bitstream)