61 lines
2.7 KiB
Markdown
61 lines
2.7 KiB
Markdown
# Entity: GenericCounter
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- **File**: [GenericCounter.vhd](src/GenericCounter.vhd)
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## Diagram
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## Description
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- Name: Generic Counter <br>
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- Version: 0.0.2 <br>
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- Author: **Maximilian Passarello ([Blog](https://mpassarello.de))** <br>
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- License: [MIT](LICENSE) <br>
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Generic Counter with the following features:
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- **Without Output Register**
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- Look ahead value (configurable per generic)
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- Synchronous reset
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- Clock enable
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- `Set` with priority over the `CountEnable`
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- Over- and Underflow flag
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- Configurable width
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- Configurable initial value
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- Configurable reset value
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- Configurable counting direction (Up and Down counting)
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## History
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- 0.0.1 (2024-03-15) Initial version
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- 0.0.2 (2024-03-16) Added Testbench. Simulation passed.
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## Waveform
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## Generics
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| Generic name | Type | Value | Description |
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| ----------------- | ------- | ----- | ---------------------------------- |
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| Width | integer | 4 | Width of the counter |
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| InitialValue | integer | 0 | Initial value of the counter |
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| ResetValue | integer | 0 | Reset value of the counter |
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| CountingDirection | string | "UP" | Counting direction: "UP" or "DOWN" |
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| LookAhead | integer | 0 | Look ahead value |
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## Ports
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| Port name | Direction | Type | Description |
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| -------------- | --------- | ------------------------------------ | --------------------------------------------------- |
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| CLK | in | std_logic | Clock input; rising edge |
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| RST | in | std_logic | Reset input; active high; synchronous |
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| CE | in | std_logic | Clock enable; active high |
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| CountEnable | in | std_logic | Count enable; active high |
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| CounterValue | out | std_logic_vector(Width - 1 downto 0) | Counter Value |
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| LookAheadValue | out | std_logic_vector(Width - 1 downto 0) | Look ahead value |
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| Set | in | std_logic | Set with priority over the `CountEnable` |
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| SetValue | in | std_logic_vector(Width - 1 downto 0) | If set is high, the counter will be set to SetValue |
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| OverUnderflow | out | std_logic | Over- and Underflow flag |
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