Add DEPP Interface Documentation and Waveform
Introduced comprehensive documentation for the Digilent EPP (DEPP) interface, including its description, generics, ports, signals, types, and functions. Accompanying waveform diagrams for EPP Address Write were also included to illustrate the timing behavior and control signals during operations. This enhanced documentation will aid in understanding and utilizing the DEPP interface on Digilent FPGA boards.
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18
docs/Waveforms/EPP Address Write.json
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18
docs/Waveforms/EPP Address Write.json
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{
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"signal": [
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{ "name": "DEPP_Bus", "wave": "xx3....xxx", "data": ["Adress"] },
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{ "name": "DEPP_WriteEnable", "wave": "1.0....1.." },
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{ "node": "...A...B", "phase": 0.15 },
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{ "name": "DEPP_AddressEnable", "wave": "1..0...1.." },
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{ "node": "...E.F.H.I", "phase": 0.15 },
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{ "node": ".C.D.G", "phase": 0.15 },
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{ "name": "DEPP_Wait", "wave": "x0...1...0" }
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],
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"head": {
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"text": "EPP Address Write"
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},
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"foot": {
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"text": "EPP Address Write Cycle Timing Diagram"
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},
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"edge": ["A+B min. 80 ns", "C+D min. 40ns", "E+F 0 to 10ms", "H+I 0 to 10ms"]
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}
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