Add DEPP Interface Documentation and Waveform

Introduced comprehensive documentation for the Digilent EPP (DEPP) interface, including its description, generics, ports, signals, types, and functions. Accompanying waveform diagrams for EPP Address Write were also included to illustrate the timing behavior and control signals during operations. This enhanced documentation will aid in understanding and utilizing the DEPP interface on Digilent FPGA boards.
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2024-03-07 00:45:24 +01:00
parent cebbf26673
commit e72c7e882b
4 changed files with 93 additions and 0 deletions

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{
"signal": [
{ "name": "DEPP_Bus", "wave": "xx3....xxx", "data": ["Adress"] },
{ "name": "DEPP_WriteEnable", "wave": "1.0....1.." },
{ "node": "...A...B", "phase": 0.15 },
{ "name": "DEPP_AddressEnable", "wave": "1..0...1.." },
{ "node": "...E.F.H.I", "phase": 0.15 },
{ "node": ".C.D.G", "phase": 0.15 },
{ "name": "DEPP_Wait", "wave": "x0...1...0" }
],
"head": {
"text": "EPP Address Write"
},
"foot": {
"text": "EPP Address Write Cycle Timing Diagram"
},
"edge": ["A+B min. 80 ns", "C+D min. 40ns", "E+F 0 to 10ms", "H+I 0 to 10ms"]
}