HDL/AXI-ROB
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5e7afaade3c23c6358637ce22184419dda225106
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Max P 5e7afaade3 chore(gitignore): add entries for build and config files 
- Add ignore patterns for build artifacts and configuration files
- Prevent accidental inclusion of temporary and generated files
2025-07-07 13:14:18 +00:00
.devcontainer
feat(devcontainer): add Xilinx ISE development configuration
2025-07-07 13:14:09 +00:00
.vscode
feat(devcontainer): add Xilinx ISE development configuration
2025-07-07 13:14:09 +00:00
.gitignore
chore(gitignore): add entries for build and config files
2025-07-07 13:14:18 +00:00
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VHDL 100%