- Introduced new scripts for project generation and synthesis (dodo.py, generate_prj.py, generate_scr.py, run_xst.py). - Implemented configuration parsing for VHDL sources and project settings (config.py). - Added default configuration values (defaults.py). - Updated .gitignore to include additional file types. - Created test cases for project generation and configuration parsing (test_generate_prj.py, test_generate_scr.py, test_project_cfg.py).
45 lines
1.2 KiB
Python
45 lines
1.2 KiB
Python
from pathlib import Path
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from tasks.generate_scr import generate_scr
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def write_file(path: Path, content: str):
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path.write_text(content.strip(), encoding="utf-8")
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def test_generate_scr_basic(tmp_path):
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cfg_path = tmp_path / "project.cfg"
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scr_path = tmp_path / "working" / "MyProject.scr"
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write_file(cfg_path, """
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PROJECT = MyProject
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TARGET_PART = xc3s50-4-pq208
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XILINX = /some/path
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""")
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generate_scr(scr_path, cfg_path)
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content = scr_path.read_text()
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assert "-ifn MyProject.prj" in content
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assert "-ofn MyProject.ngc" in content
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assert "-top MyProject" in content
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assert "-p xc3s50-4-pq208" in content
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def test_generate_scr_with_top_and_opts(tmp_path):
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cfg_path = tmp_path / "project.cfg"
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scr_path = tmp_path / "working" / "MyProject.scr"
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write_file(cfg_path, """
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PROJECT = MyProject
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TARGET_PART = xc3s200-5-ft256
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TOPLEVEL = TopModule
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XST_OPTS = -opt_mode Speed -opt_level 2
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XILINX = /some/path
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""")
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generate_scr(scr_path, cfg_path)
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content = scr_path.read_text()
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assert "-top TopModule" in content
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assert "-opt_mode Speed -opt_level 2" in content
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