diff --git a/Makefile b/Makefile index aa95ffa..57e7aba 100644 --- a/Makefile +++ b/Makefile @@ -1,11 +1,18 @@ +########################################################################### ## Xilinx ISE Makefile ## ## To the extent possible under law, the author(s) have dedicated all copyright ## and related and neighboring rights to this software to the public domain ## worldwide. This software is distributed without any warranty. +########################################################################### include project.cfg + +########################################################################### +# Default values +########################################################################### + ifndef XILINX $(error XILINX must be defined) endif @@ -28,6 +35,8 @@ NGDBUILD_OPTS ?= MAP_OPTS ?= PAR_OPTS ?= BITGEN_OPTS ?= +TRACE_OPTS ?= +FUSE_OPTS ?= -incremental PROGRAMMER ?= none @@ -38,13 +47,39 @@ DJTG_DEVICE ?= DJTG_DEVICE-NOT-SET DJTG_INDEX ?= 0 XC3SPROG_EXE ?= xc3sprog -XC3SPROG_CABLE ?= -c none +XC3SPROG_CABLE ?= none XC3SPROG_OPTS ?= + +########################################################################### +# Internal variables, platform-specific definitions, and macros ########################################################################### +ifeq ($(OS),Windows_NT) + XILINX := $(shell cygpath -m $(XILINX)) + CYG_XILINX := $(shell cygpath $(XILINX)) + EXE := .exe + XILINX_PLATFORM ?= nt64 + PATH := $(PATH):$(CYG_XILINX)/bin/$(XILINX_PLATFORM) +else + EXE := + XILINX_PLATFORM ?= lin64 + PATH := $(PATH):$(XILINX)/bin/$(XILINX_PLATFORM) +endif + +TEST_NAMES = $(foreach file,$(VTEST) $(VHDTEST),$(basename $(file))) +TEST_EXES = $(foreach test,$(TEST_NAMES),build/isim_$(test)$(EXE)) + RUN = @echo -ne "\n\n\e[1;33m======== $(1) ========\e[m\n\n"; \ - cd build && $(XILINX)/$(1) + cd build && $(XILINX)/bin/$(XILINX_PLATFORM)/$(1) + +# isim executables don't work without this +export XILINX + + +########################################################################### +# Default build +########################################################################### default: $(BITFILE) @@ -58,6 +93,12 @@ build/$(PROJECT).prj: project.cfg @$(foreach file,$(VSOURCE),echo "verilog work \"../$(file)\"" >> $@;) @$(foreach file,$(VHDSOURCE),echo "vhdl work \"../$(file)\"" >> $@;) +build/$(PROJECT)_sim.prj: build/$(PROJECT).prj + @cp build/$(PROJECT).prj $@ + @$(foreach file,$(VTEST),echo "verilog work \"../$(file)\"" >> $@;) + @$(foreach file,$(VHDTEST),echo "vhdl work \"../$(file)\"" >> $@;) + @echo "verilog work $(XILINX)/verilog/src/glbl.v" >> $@ + build/$(PROJECT).scr: project.cfg @echo "Updating $@" @mkdir -p build @@ -88,6 +129,39 @@ $(BITFILE): project.cfg $(VSOURCE) $(CONSTRAINTS) build/$(PROJECT).prj build/$(P -w $(PROJECT).ncd $(PROJECT).bit @echo -ne "\e[1;32m======== OK ========\e[m\n" + +########################################################################### +# Testing (work in progress) +########################################################################### + +trace: project.cfg $(BITFILE) + $(call RUN,trce) $(COMMON_OPTS) $(TRACE_OPTS) \ + $(PROJECT).ncd $(PROJECT).pcf + +test: $(TEST_EXES) + +build/isim_%$(EXE): build/$(PROJECT)_sim.prj $(VSOURCE) $(VHDSOURCE) $(VTEST) $(VHDTEST) + $(call RUN,fuse) $(COMMON_OPTS) $(FUSE_OPTS) \ + -prj $(PROJECT)_sim.prj \ + -o isim_$*$(EXE) \ + work.$* work.glbl + +#FIXME TB ?= $(error Must set TB to name of a testbench module) + +isim: build/isim_$(TB)$(EXE) + @echo "run all" >> build/isim_$(TB).cmd + cd build ; ./isim_$(TB)$(EXE) -tclbatch isim_$(TB).cmd + +isimgui: build/isim_$(TB)$(EXE) + @grep --no-filename --no-messages 'ISIM:' $(TB).{v,vhd} | cut -d: -f2 > build/isim_$(TB).cmd + @echo "run all" >> build/isim_$(TB).cmd + cd build ; ./isim_$(TB)$(EXE) -gui -tclbatch isim_$(TB).cmd + + +########################################################################### +# Programming +########################################################################### + ifeq ($(PROGRAMMER), impact) prog: $(BITFILE) $(XILINX)/impact -batch $(IMPACT_OPTS) @@ -100,7 +174,7 @@ endif ifeq ($(PROGRAMMER), xc3sprog) prog: $(BITFILE) - $(XC3SPROG_EXE) $(XC3SPROG_CABLE) $(XC3SPROG_OPTS) $(BITFILE) + $(XC3SPROG_EXE) -c $(XC3SPROG_CABLE) $(XC3SPROG_OPTS) $(BITFILE) endif ifeq ($(PROGRAMMER), none) @@ -108,4 +182,7 @@ prog: $(error PROGRAMMER must be set to use 'make prog') endif + +########################################################################### + # vim: set filetype=make: # diff --git a/README.md b/README.md index 4e50610..849b5ef 100644 --- a/README.md +++ b/README.md @@ -35,9 +35,9 @@ it consists of `KEY = value` pairs. It must define at least the following keys: The path to the appropriate binaries directory of the target Xilinx ISE install, e.g. - `/cygdrive/c/Xilinx/14.7/ISE_DS/ISE/bin/nt64` + `/cygdrive/c/Xilinx/14.7/ISE_DS/ISE` or - `/opt/Xilinx/14.7/ISE_DS/ISE/bin/lin64` + `/opt/Xilinx/14.7/ISE_DS/ISE` for typical installs. * `VSOURCE` and/or `VHDSOURCE` @@ -61,6 +61,13 @@ A simple `project.cfg` may thus resemble: A number of other keys can be set in the project configuration, including: + * `XILINX_PLATFORM` + + The Xilinx name for the platform to build for, e.g. `nt64` or `lin`. + `nt64` is used by default for Windows systems, and `lin64` for Linux + systems, so you only need to set this if you explicitly need to use the + 32-bit version of the tools for some reason. + * `TOPLEVEL` The name of the top-level module to be used in the project. @@ -76,7 +83,8 @@ A number of other keys can be set in the project configuration, including: Extra command-line options to be passed to all ISE executables. Defaults to `-intstyle xflow`. - * `XST_OPTS`, `NGDBUILD_OPTS`, `MAP_OPTS`, `PAR_OPTS`, `BITGEN_OPTS` + * `XST_OPTS`, `NGDBUILD_OPTS`, `MAP_OPTS`, `PAR_OPTS`, `BITGEN_OPTS`, + `TRACE_OPTS`, `FUSE_OPTS` Extra command-line options to be passed to the corresponding ISE tools. All default to empty. @@ -141,14 +149,18 @@ The Xilinx ISE Makefile implements the following targets: configuration; see below for details. +Running unit tests +------------------ + +is a work in progress. + + Unimplemented features ---------------------- The following features are not currently implemented. (Pull requests are encouraged!) - * Building and/or running testbenches - * Generation of SPI or other unusual programming files * CPLD synthesis