HDL/SpriteChannel
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Test

Browse Source
This commit is contained in:
0xMax42
2025-04-22 15:23:15 +00:00
parent 7888d608ae
commit 73a436eb40
14 changed files with 1038 additions and 415 deletions
Download Patch File Download Diff File Expand all files Collapse all files

46
test/YHitCheck_tb.vhd
View File

@@ -9,21 +9,21 @@ end;
architecture bench of YHitCheck_tb is
-- Clock period
constant K_CLKPeriod : time := 10 ns;
constant K_CLKPeriod : time := 10 ns;
-- Generics
constant G_YWidth : integer := 10;
constant G_SpriteHeight : integer := 16;
constant G_YWidth : integer := 10;
constant G_SpriteHeight : integer := 16;
-- Ports
signal I_CLK : std_logic := '0';
signal I_CE : std_logic;
signal O_Ready : std_logic;
signal I_Valid : std_logic;
signal I_YToCheck : std_logic_vector(G_YWidth - 1 downto 0);
signal I_Y : std_logic_vector(G_YWidth - 1 downto 0);
signal I_Ready : std_logic;
signal O_Valid : std_logic;
signal O_IsVisible : std_logic;
signal O_Offset : std_logic_vector(7 downto 0);
signal I_CLK : std_logic := '0';
signal I_CE : std_logic;
signal O_Ready : std_logic;
signal I_Valid : std_logic;
signal I_YToCheck : std_logic_vector(G_YWidth - 1 downto 0);
signal I_Y : std_logic_vector(G_YWidth - 1 downto 0);
signal I_Ready : std_logic;
signal O_Valid : std_logic;
signal O_IsVisible : std_logic;
signal O_Offset : std_logic_vector(7 downto 0);
type T_TestData is record
YToCheck : integer;
@@ -86,16 +86,16 @@ begin
G_Sprite_Height => G_SpriteHeight
)
port map(
I_CLK => I_CLK,
I_CE => I_CE,
O_Ready => O_Ready,
I_Valid => I_Valid,
I_YToCheck => I_YToCheck,
I_Y => I_Y,
I_Ready => I_Ready,
O_Valid => O_Valid,
O_IsVisible => O_IsVisible,
O_Offset => O_Offset
I_CLK => I_CLK,
I_CE => I_CE,
O_VSpritePipeline_OP_Ready => O_Ready,
I_VSpritePipeline_OP_Valid => I_Valid,
I_VSpritePipeline_OP_Y_Request => I_YToCheck,
I_VSpritePipeline_OP_Y_Sprite => I_Y,
I_VSpritePipeline_Ready => I_Ready,
O_VSpritePipeline_Valid => O_Valid,
O_VSpritePipeline_IsVisible => O_IsVisible,
O_VSpritePipeline_Offset => O_Offset
);
StimulusProc : process