MaxP
3a588948a6
Introduces the PipelineSwitch component with configurable routing behavior based on input comparison modes. Implements modes such as "none", "or", "and", "xor", "equal", and others. Adds a comprehensive testbench to validate functionality across all supported modes.
517 lines
20 KiB
VHDL
517 lines
20 KiB
VHDL
library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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use ieee.math_real.all;
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entity PipelineSwitch_tb is
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end entity PipelineSwitch_tb;
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architecture RTL of PipelineSwitch_tb is
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constant G_MaskWidth : integer := 4;
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constant G_Mask : std_logic_vector(G_MaskWidth - 1 downto 0) := "1101";
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-- === Signals for mode "none" ===
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signal I_Match_none : std_logic_vector(G_MaskWidth - 1 downto 0) := (others => '0');
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signal I_Valid_none : std_logic := '0';
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signal O_Ready_none : std_logic;
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signal O_Default_Valid_none : std_logic;
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signal I_Default_Ready_none : std_logic := '0';
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signal O_Selected_Valid_none : std_logic;
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signal I_Selected_Ready_none : std_logic := '0';
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-- === Signals for mode "or" ===
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signal I_Match_or : std_logic_vector(G_MaskWidth - 1 downto 0) := (others => '0');
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signal I_Valid_or : std_logic := '0';
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signal O_Ready_or : std_logic;
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signal O_Default_Valid_or : std_logic;
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signal I_Default_Ready_or : std_logic := '0';
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signal O_Selected_Valid_or : std_logic;
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signal I_Selected_Ready_or : std_logic := '0';
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-- === Signals for mode "and" ===
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signal I_Match_and : std_logic_vector(G_MaskWidth - 1 downto 0) := (others => '0');
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signal I_Valid_and : std_logic := '0';
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signal O_Ready_and : std_logic;
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signal O_Default_Valid_and : std_logic;
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signal I_Default_Ready_and : std_logic := '0';
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signal O_Selected_Valid_and : std_logic;
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signal I_Selected_Ready_and : std_logic := '0';
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-- === Signals for mode "xor" ===
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signal I_Match_xor : std_logic_vector(G_MaskWidth - 1 downto 0) := (others => '0');
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signal I_Valid_xor : std_logic := '0';
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signal O_Ready_xor : std_logic;
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signal O_Default_Valid_xor : std_logic;
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signal I_Default_Ready_xor : std_logic := '0';
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signal O_Selected_Valid_xor : std_logic;
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signal I_Selected_Ready_xor : std_logic := '0';
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-- === Signals for mode "equal" ===
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signal I_Match_eq : std_logic_vector(G_MaskWidth - 1 downto 0) := (others => '0');
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signal I_Valid_eq : std_logic := '0';
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signal O_Ready_eq : std_logic;
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signal O_Default_Valid_eq : std_logic;
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signal I_Default_Ready_eq : std_logic := '0';
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signal O_Selected_Valid_eq : std_logic;
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signal I_Selected_Ready_eq : std_logic := '0';
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-- === Signals for mode "not_eq" ===
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signal I_Match_neq : std_logic_vector(G_MaskWidth - 1 downto 0) := (others => '0');
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signal I_Valid_neq : std_logic := '0';
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signal O_Ready_neq : std_logic;
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signal O_Default_Valid_neq : std_logic;
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signal I_Default_Ready_neq : std_logic := '0';
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signal O_Selected_Valid_neq : std_logic;
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signal I_Selected_Ready_neq : std_logic := '0';
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-- === Signals for mode "gt" ===
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signal I_Match_gt : std_logic_vector(G_MaskWidth - 1 downto 0) := (others => '0');
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signal I_Valid_gt : std_logic := '0';
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signal O_Ready_gt : std_logic;
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signal O_Default_Valid_gt : std_logic;
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signal I_Default_Ready_gt : std_logic := '0';
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signal O_Selected_Valid_gt : std_logic;
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signal I_Selected_Ready_gt : std_logic := '0';
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-- === Signals for mode "ge" ===
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signal I_Match_ge : std_logic_vector(G_MaskWidth - 1 downto 0) := (others => '0');
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signal I_Valid_ge : std_logic := '0';
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signal O_Ready_ge : std_logic;
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signal O_Default_Valid_ge : std_logic;
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signal I_Default_Ready_ge : std_logic := '0';
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signal O_Selected_Valid_ge : std_logic;
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signal I_Selected_Ready_ge : std_logic := '0';
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-- === Signals for mode "lt" ===
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signal I_Match_lt : std_logic_vector(G_MaskWidth - 1 downto 0) := (others => '0');
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signal I_Valid_lt : std_logic := '0';
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signal O_Ready_lt : std_logic;
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signal O_Default_Valid_lt : std_logic;
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signal I_Default_Ready_lt : std_logic := '0';
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signal O_Selected_Valid_lt : std_logic;
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signal I_Selected_Ready_lt : std_logic := '0';
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-- === Signals for mode "le" ===
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signal I_Match_le : std_logic_vector(G_MaskWidth - 1 downto 0) := (others => '0');
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signal I_Valid_le : std_logic := '0';
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signal O_Ready_le : std_logic;
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signal O_Default_Valid_le : std_logic;
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signal I_Default_Ready_le : std_logic := '0';
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signal O_Selected_Valid_le : std_logic;
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signal I_Selected_Ready_le : std_logic := '0';
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begin
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-- === Instanz: "none" ===
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UUT_none : entity work.PipelineSwitch
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generic map(
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G_MaskWidth => G_MaskWidth,
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G_Mask => G_Mask,
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G_MaskMode => "none"
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)
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port map(
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I_Match => I_Match_none,
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I_Valid => I_Valid_none,
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O_Ready => O_Ready_none,
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O_Default_Valid => O_Default_Valid_none,
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I_Default_Ready => I_Default_Ready_none,
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O_Selected_Valid => O_Selected_Valid_none,
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I_Selected_Ready => I_Selected_Ready_none
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);
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-- === Instanz: "or" ===
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UUT_or : entity work.PipelineSwitch
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generic map(
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G_MaskWidth => G_MaskWidth,
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G_Mask => G_Mask,
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G_MaskMode => "or"
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)
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port map(
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I_Match => I_Match_or,
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I_Valid => I_Valid_or,
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O_Ready => O_Ready_or,
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O_Default_Valid => O_Default_Valid_or,
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I_Default_Ready => I_Default_Ready_or,
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O_Selected_Valid => O_Selected_Valid_or,
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I_Selected_Ready => I_Selected_Ready_or
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);
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-- === Instanz: "and" ===
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UUT_and : entity work.PipelineSwitch
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generic map(
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G_MaskWidth => G_MaskWidth,
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G_Mask => G_Mask,
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G_MaskMode => "and"
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)
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port map(
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I_Match => I_Match_and,
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I_Valid => I_Valid_and,
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O_Ready => O_Ready_and,
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O_Default_Valid => O_Default_Valid_and,
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I_Default_Ready => I_Default_Ready_and,
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O_Selected_Valid => O_Selected_Valid_and,
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I_Selected_Ready => I_Selected_Ready_and
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);
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-- === Instanz: "xor" ===
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UUT_xor : entity work.PipelineSwitch
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generic map(
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G_MaskWidth => G_MaskWidth,
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G_Mask => G_Mask,
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G_MaskMode => "xor"
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)
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port map(
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I_Match => I_Match_xor,
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I_Valid => I_Valid_xor,
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O_Ready => O_Ready_xor,
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O_Default_Valid => O_Default_Valid_xor,
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I_Default_Ready => I_Default_Ready_xor,
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O_Selected_Valid => O_Selected_Valid_xor,
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I_Selected_Ready => I_Selected_Ready_xor
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);
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-- === Instanz: "equal" ===
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UUT_eq : entity work.PipelineSwitch
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generic map(
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G_MaskWidth => G_MaskWidth,
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G_Mask => G_Mask,
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G_MaskMode => "equal"
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)
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port map(
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I_Match => I_Match_eq,
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I_Valid => I_Valid_eq,
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O_Ready => O_Ready_eq,
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O_Default_Valid => O_Default_Valid_eq,
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I_Default_Ready => I_Default_Ready_eq,
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O_Selected_Valid => O_Selected_Valid_eq,
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I_Selected_Ready => I_Selected_Ready_eq
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);
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-- === Instanz: "not_eq" ===
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UUT_neq : entity work.PipelineSwitch
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generic map(
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G_MaskWidth => G_MaskWidth,
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G_Mask => G_Mask,
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G_MaskMode => "not_equal"
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)
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port map(
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I_Match => I_Match_neq,
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I_Valid => I_Valid_neq,
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O_Ready => O_Ready_neq,
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O_Default_Valid => O_Default_Valid_neq,
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I_Default_Ready => I_Default_Ready_neq,
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O_Selected_Valid => O_Selected_Valid_neq,
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I_Selected_Ready => I_Selected_Ready_neq
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);
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-- === Instanz: "gt" ===
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UUT_gt : entity work.PipelineSwitch
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generic map(
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G_MaskWidth => G_MaskWidth,
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G_Mask => G_Mask,
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G_MaskMode => "gt"
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)
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port map(
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I_Match => I_Match_gt,
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I_Valid => I_Valid_gt,
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O_Ready => O_Ready_gt,
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O_Default_Valid => O_Default_Valid_gt,
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I_Default_Ready => I_Default_Ready_gt,
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O_Selected_Valid => O_Selected_Valid_gt,
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I_Selected_Ready => I_Selected_Ready_gt
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);
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-- === Instanz: "ge" ===
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UUT_ge : entity work.PipelineSwitch
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generic map(
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G_MaskWidth => G_MaskWidth,
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G_Mask => G_Mask,
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G_MaskMode => "ge"
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)
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port map(
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I_Match => I_Match_ge,
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I_Valid => I_Valid_ge,
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O_Ready => O_Ready_ge,
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O_Default_Valid => O_Default_Valid_ge,
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I_Default_Ready => I_Default_Ready_ge,
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O_Selected_Valid => O_Selected_Valid_ge,
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I_Selected_Ready => I_Selected_Ready_ge
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);
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-- === Instanz: "lt" ===
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UUT_lt : entity work.PipelineSwitch
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generic map(
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G_MaskWidth => G_MaskWidth,
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G_Mask => G_Mask,
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G_MaskMode => "lt"
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)
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port map(
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I_Match => I_Match_lt,
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I_Valid => I_Valid_lt,
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O_Ready => O_Ready_lt,
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O_Default_Valid => O_Default_Valid_lt,
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I_Default_Ready => I_Default_Ready_lt,
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O_Selected_Valid => O_Selected_Valid_lt,
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I_Selected_Ready => I_Selected_Ready_lt
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);
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-- === Instanz: "le" ===
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UUT_le : entity work.PipelineSwitch
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generic map(
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G_MaskWidth => G_MaskWidth,
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G_Mask => G_Mask,
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G_MaskMode => "le"
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)
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port map(
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I_Match => I_Match_le,
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I_Valid => I_Valid_le,
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O_Ready => O_Ready_le,
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O_Default_Valid => O_Default_Valid_le,
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I_Default_Ready => I_Default_Ready_le,
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O_Selected_Valid => O_Selected_Valid_le,
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I_Selected_Ready => I_Selected_Ready_le
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);
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stimulus : process
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begin
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wait for 10 ns;
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----------------------------------------------------------------
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-- Mode: "none"
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----------------------------------------------------------------
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report "Testmodus: none";
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I_Default_Ready_none <= '1';
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I_Match_none <= "0000";
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I_Valid_none <= '1';
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wait for 10 ns;
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assert O_Default_Valid_none = '1' and O_Selected_Valid_none = '0'
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report "Fehler im Modus 'none'" severity error;
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I_Valid_none <= '0';
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I_Default_Ready_none <= '0';
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wait for 10 ns;
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----------------------------------------------------------------
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-- Mode: "or"
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----------------------------------------------------------------
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report "Testmodus: or";
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I_Selected_Ready_or <= '1';
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I_Match_or <= "0100"; -- bit 2 matches mask
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I_Valid_or <= '1';
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wait for 10 ns;
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assert O_Selected_Valid_or = '1' and O_Default_Valid_or = '0'
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report "Fehler im Modus 'or' (Match-Fall)" severity error;
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I_Selected_Ready_or <= '0';
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I_Valid_or <= '0';
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wait for 10 ns;
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I_Default_Ready_or <= '1';
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I_Match_or <= "0010"; -- no bit matches mask
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I_Valid_or <= '1';
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wait for 10 ns;
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assert O_Default_Valid_or = '1' and O_Selected_Valid_or = '0'
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report "Fehler im Modus 'or' (No-Match-Fall)" severity error;
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I_Default_Ready_or <= '0';
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I_Valid_or <= '0';
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wait for 10 ns;
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----------------------------------------------------------------
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-- Mode: "and"
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----------------------------------------------------------------
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report "Testmodus: and";
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I_Selected_Ready_and <= '1';
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I_Match_and <= "1101";
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I_Valid_and <= '1';
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wait for 10 ns;
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assert O_Selected_Valid_and = '1' and O_Default_Valid_and = '0'
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report "Fehler im Modus 'and' (Match-Fall)" severity error;
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I_Selected_Ready_and <= '0';
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I_Valid_and <= '0';
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wait for 10 ns;
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I_Default_Ready_and <= '1';
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I_Match_and <= "1001"; -- bit 2 missing
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I_Valid_and <= '1';
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wait for 10 ns;
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assert O_Default_Valid_and = '1' and O_Selected_Valid_and = '0'
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report "Fehler im Modus 'and' (No-Match-Fall)" severity error;
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I_Default_Ready_and <= '0';
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I_Valid_and <= '0';
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wait for 10 ns;
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----------------------------------------------------------------
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-- Mode: "xor"
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----------------------------------------------------------------
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report "Testmodus: xor";
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I_Selected_Ready_xor <= '1';
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I_Match_xor <= "1001"; -- differs at bit 2
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I_Valid_xor <= '1';
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wait for 10 ns;
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assert O_Selected_Valid_xor = '1' and O_Default_Valid_xor = '0'
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report "Fehler im Modus 'xor' (Match-Fall)" severity error;
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I_Selected_Ready_xor <= '0';
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I_Valid_xor <= '0';
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wait for 10 ns;
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I_Default_Ready_xor <= '1';
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I_Match_xor <= "1101";
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I_Valid_xor <= '1';
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wait for 10 ns;
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assert O_Default_Valid_xor = '1' and O_Selected_Valid_xor = '0'
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report "Fehler im Modus 'xor' (No-Match-Fall)" severity error;
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I_Default_Ready_xor <= '0';
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I_Valid_xor <= '0';
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wait for 10 ns;
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----------------------------------------------------------------
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-- Mode: "equal"
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----------------------------------------------------------------
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report "Testmodus: equal";
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I_Selected_Ready_eq <= '1';
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I_Match_eq <= "1101";
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I_Valid_eq <= '1';
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wait for 10 ns;
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assert O_Selected_Valid_eq = '1' and O_Default_Valid_eq = '0'
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report "Fehler im Modus 'equal' (Match-Fall)" severity error;
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I_Selected_Ready_eq <= '0';
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I_Valid_eq <= '0';
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wait for 10 ns;
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I_Default_Ready_eq <= '1';
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I_Match_eq <= "1111";
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I_Valid_eq <= '1';
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wait for 10 ns;
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assert O_Default_Valid_eq = '1' and O_Selected_Valid_eq = '0'
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report "Fehler im Modus 'equal' (No-Match-Fall)" severity error;
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I_Default_Ready_eq <= '0';
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I_Valid_eq <= '0';
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wait for 10 ns;
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----------------------------------------------------------------
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-- Mode: "not_equal"
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----------------------------------------------------------------
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report "Testmodus: not_equal";
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I_Selected_Ready_neq <= '1';
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I_Match_neq <= "1111"; -- not equal
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I_Valid_neq <= '1';
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wait for 10 ns;
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assert O_Selected_Valid_neq = '1' and O_Default_Valid_neq = '0'
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report "Fehler im Modus 'not_equal' (Match-Fall)" severity error;
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I_Selected_Ready_neq <= '0';
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I_Valid_neq <= '0';
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wait for 10 ns;
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I_Default_Ready_neq <= '1';
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I_Match_neq <= "1101";
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I_Valid_neq <= '1';
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wait for 10 ns;
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assert O_Default_Valid_neq = '1' and O_Selected_Valid_neq = '0'
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report "Fehler im Modus 'not_equal' (No-Match-Fall)" severity error;
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I_Default_Ready_neq <= '0';
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I_Valid_neq <= '0';
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wait for 10 ns;
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----------------------------------------------------------------
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-- Mode: "gt"
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----------------------------------------------------------------
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report "Testmodus: gt";
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I_Selected_Ready_gt <= '1';
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I_Match_gt <= "1110"; -- > 1101
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I_Valid_gt <= '1';
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wait for 10 ns;
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assert O_Selected_Valid_gt = '1' and O_Default_Valid_gt = '0'
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report "Fehler im Modus 'gt' (Match-Fall)" severity error;
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I_Selected_Ready_gt <= '0';
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I_Valid_gt <= '0';
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wait for 10 ns;
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I_Default_Ready_gt <= '1';
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I_Match_gt <= "1010"; -- < 1101
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I_Valid_gt <= '1';
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wait for 10 ns;
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assert O_Default_Valid_gt = '1' and O_Selected_Valid_gt = '0'
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report "Fehler im Modus 'gt' (No-Match-Fall)" severity error;
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I_Default_Ready_gt <= '0';
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I_Valid_gt <= '0';
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wait for 10 ns;
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----------------------------------------------------------------
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-- Mode: "ge"
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----------------------------------------------------------------
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report "Testmodus: ge";
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I_Selected_Ready_ge <= '1';
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I_Match_ge <= "1101"; -- == 1101
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I_Valid_ge <= '1';
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wait for 10 ns;
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assert O_Selected_Valid_ge = '1' and O_Default_Valid_ge = '0'
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report "Fehler im Modus 'ge' (Match-Fall ==)" severity error;
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I_Selected_Ready_ge <= '0';
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I_Valid_ge <= '0';
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wait for 10 ns;
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I_Default_Ready_ge <= '1';
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I_Match_ge <= "0101"; -- < 1101
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I_Valid_ge <= '1';
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wait for 10 ns;
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assert O_Default_Valid_ge = '1' and O_Selected_Valid_ge = '0'
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report "Fehler im Modus 'ge' (No-Match-Fall)" severity error;
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I_Default_Ready_ge <= '0';
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I_Valid_ge <= '0';
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wait for 10 ns;
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----------------------------------------------------------------
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-- Mode: "lt"
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----------------------------------------------------------------
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report "Testmodus: lt";
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I_Selected_Ready_lt <= '1';
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|
I_Match_lt <= "0101"; -- < 1101
|
|
I_Valid_lt <= '1';
|
|
wait for 10 ns;
|
|
assert O_Selected_Valid_lt = '1' and O_Default_Valid_lt = '0'
|
|
report "Fehler im Modus 'lt' (Match-Fall)" severity error;
|
|
I_Selected_Ready_lt <= '0';
|
|
I_Valid_lt <= '0';
|
|
wait for 10 ns;
|
|
|
|
I_Default_Ready_lt <= '1';
|
|
I_Match_lt <= "1111"; -- > 1101
|
|
I_Valid_lt <= '1';
|
|
wait for 10 ns;
|
|
assert O_Default_Valid_lt = '1' and O_Selected_Valid_lt = '0'
|
|
report "Fehler im Modus 'lt' (No-Match-Fall)" severity error;
|
|
I_Default_Ready_lt <= '0';
|
|
I_Valid_lt <= '0';
|
|
wait for 10 ns;
|
|
|
|
----------------------------------------------------------------
|
|
-- Mode: "le"
|
|
----------------------------------------------------------------
|
|
report "Testmodus: le";
|
|
I_Selected_Ready_le <= '1';
|
|
I_Match_le <= "1101"; -- == 1101
|
|
I_Valid_le <= '1';
|
|
wait for 10 ns;
|
|
assert O_Selected_Valid_le = '1' and O_Default_Valid_le = '0'
|
|
report "Fehler im Modus 'le' (Match-Fall ==)" severity error;
|
|
I_Selected_Ready_le <= '0';
|
|
I_Valid_le <= '0';
|
|
wait for 10 ns;
|
|
|
|
I_Default_Ready_le <= '1';
|
|
I_Match_le <= "1111"; -- > 1101
|
|
I_Valid_le <= '1';
|
|
wait for 10 ns;
|
|
assert O_Default_Valid_le = '1' and O_Selected_Valid_le = '0'
|
|
report "Fehler im Modus 'le' (No-Match-Fall)" severity error;
|
|
I_Default_Ready_le <= '0';
|
|
I_Valid_le <= '0';
|
|
wait for 10 ns;
|
|
|
|
----------------------------------------------------------------
|
|
-- Done!
|
|
----------------------------------------------------------------
|
|
report "Alle Tests abgeschlossen!" severity note;
|
|
wait;
|
|
end process;
|
|
|
|
end architecture RTL;
|