Introduces conditional logic to handle cases with zero pipeline stages, improving adaptability. Adds default values for generics and ports to enhance usability and reduce configuration errors. Cleans up formatting for better readability and maintainability. Relates to improved design modularity.
4 lines
36 B
Plaintext
4 lines
36 B
Plaintext
build/working
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.locale/
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vhdl_ls.toml
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