From 310a85bcb5cc6c75d88ba12d402d2ff286592c08 Mon Sep 17 00:00:00 2001 From: Max P Date: Mon, 7 Jul 2025 12:26:50 +0000 Subject: [PATCH] feat(entity): add default values to GenericCounter ports - Initialize all input and output ports with default values - Enhances usability by preventing uninitialized signals --- src/GenericCounter.vhd | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/src/GenericCounter.vhd b/src/GenericCounter.vhd index 5f92d5f..cce5533 100644 --- a/src/GenericCounter.vhd +++ b/src/GenericCounter.vhd @@ -108,23 +108,23 @@ entity GenericCounter is ); port ( --@ Clock input; rising edge - I_CLK : in std_logic; + I_CLK : in std_logic := '0'; --@ Reset input; active high; synchronous - I_RST : in std_logic; + I_RST : in std_logic := '0'; --@ Clock enable; active high - I_CE : in std_logic; + I_CE : in std_logic := '1'; --@ Count enable; active high - I_CountEnable : in std_logic; + I_CountEnable : in std_logic := '0'; --@ Counter Value - O_CounterValue : out std_logic_vector(G_Width - 1 downto 0); + O_CounterValue : out std_logic_vector(G_Width - 1 downto 0) := (others => '0'); --@ Look ahead value - O_LookAheadValue : out std_logic_vector(G_Width - 1 downto 0); + O_LookAheadValue : out std_logic_vector(G_Width - 1 downto 0) := (others => '0'); --@ Set with priority over the `CountEnable` - I_Set : in std_logic; + I_Set : in std_logic := '0'; --@ If set is high, the counter will be set to SetValue - I_SetValue : in std_logic_vector(G_Width - 1 downto 0); + I_SetValue : in std_logic_vector(G_Width - 1 downto 0) := (others => '0'); --@ Over- and Underflow flag - O_OverUnderflow : out std_logic + O_OverUnderflow : out std_logic := '0' ); end entity GenericCounter;