## Main settings.. ## # Project name # @remark The name of the project is used as default name for the top module and the ucf file PROJECT = DEPP # Target device # @example xc3s1200e-4-fg320 | xc5vlx50t-1-ff1136 TARGET_PART = xc3s1200e-4-fg320 # Path to the Xilinx ISE installation XILINX = /opt/Xilinx/14.7/ISE_DS/ISE # Optional the name of the top module (default is the project name) TOPLEVEL = Nexys2Test # Optional the name of the ucf file (default is the project name) CONSTRAINTS = code/Nexys2Test.ucf ## ## ## ## ## ## ## ## # --------------------- ## Source files settings.. ## # The source files to be compiled # @example `VSOURCE += src/main.v` (add a single Verilog file per line) # @example `VHDSOURCE += src/main.vhd` (add a single VHDL file per line) VHDSOURCE += code/Nexys2Test.vhd VHDSOURCE += code/DEPP.vhd ## ## ## ## ## ## ## ## # --------------------- ## ISE executable settings.. ## # General command line options to be passed to all ISE executables (default is `-intstyle xflow`) # COMMON_OPTS = # Options for the XST synthesizer # XST_OPTS = # Options for the NGDBuild tool # NGDBUILD_OPTS = # Options for the MAP tool # @example -mt 2 (multi-threading with 2 threads) # MAP_OPTS = # Options for the PAR tool # @example -mt 2 (multi-threading with 2 threads) # PAR_OPTS = # Options for the BitGen tool # @example -g Compress (compress bitstream) # @example -g StartupClk:Cclk (specify the startup clock to onboard clock) # @example -g StartupClk:JtagClk (specify the startup clock to JTAG clock) # BITGEN_OPTS = # Options for the Trace tool # TRACE_OPTS = # Options for the Fuse tool # FUSE_OPTS = ## ## ## ## ## ## ## ## # --------------------- ## Programmer settings.. ## # The programmer to use # @example impact | digilent | xc3sprog # @remark impact is the default Xilinx programmer and you must create a impact.cmd file in the root directory.. PROGRAMMER = digilent ## Digilent JTAG cable settings # @remark Use the `djtgcfg enum` command to list all available devices DJTG_DEVICE = DOnbUsb # The index of the JTAG device for the `prog` target DJTG_INDEX = 0 # The index of the flash device for the `flash` target DJTG_FLASH_INDEX = 1 # Pre-programmer command PROGRAMMER_PRE = yes Y | sudo ## ## ## ## ## ## ## ## # ---------------------