From 4f5642709ccf0e90cb98ef1fd2ba6af0ed2d9cff Mon Sep 17 00:00:00 2001 From: Max P Date: Sat, 9 Mar 2024 00:02:17 +0100 Subject: [PATCH] Add Logic Analyzer waveform captures to docs Included new Logic Analyzer Captures section in README and created a corresponding markdown file with waveform images for various EPP cycles. This provides visual aids for better understanding the timing and behavior of EPP transactions. --- README.md | 4 ++++ .../Logic Analyzer Captures.md | 13 +++++++++++++ 2 files changed, 17 insertions(+) create mode 100644 docs/Logic Analyzer Captures/Logic Analyzer Captures.md diff --git a/README.md b/README.md index 6c0b281..e2f28f1 100644 --- a/README.md +++ b/README.md @@ -24,6 +24,10 @@ The `DEPP.vhd` module is designed as an Enhanced Parallel Port (EPP) interface f ![Waveform of the EPP Data Read Cycle](docs/DEPP/wavedrom_91sO2.svg "EPP Data Read") +### Logic Analyzer Captures + +The captures can be found in the [Logic Analyzer Captures](docs/Logic%20Analyzer%20Captures/Logic%20Analyzer%20Captures.md) directory. + ## Port Definitions | Port Name | Direction | Type | Description | diff --git a/docs/Logic Analyzer Captures/Logic Analyzer Captures.md b/docs/Logic Analyzer Captures/Logic Analyzer Captures.md new file mode 100644 index 0000000..5ae3cb4 --- /dev/null +++ b/docs/Logic Analyzer Captures/Logic Analyzer Captures.md @@ -0,0 +1,13 @@ +# Logic Analyzer Captures + +## Address Write Cycle + +![Waveform of the EPP Address Write Cycle](Address%20Write%20Cycle.webp "EPP Address Write") + +## Data Write Cycle + +![Waveform of the EPP Data Write Cycle](Data%20Write%20Cycle.webp "EPP Data Write") + +## Data Read Cycle + +![Waveform of the EPP Data Read Cycle](Data%20Read%20Cycle.webp "EPP Data Read")